Totalview® Reference Guide : PART III Platforms and Operating Systems : Chapter 11 Architectures : Power Architectures : Blue Gene/Q QPX Floating-Point Registers
Blue Gene/Q QPX Floating-Point Registers
TotalView displays the Blue Gene/Q Quad Processing eXtension to the Power ISA (QPX) registers in the Stack Frame Pane of the Process Window. The architecture provides for 32 256-bit registers that can be used as four doubles, eight floats, four 64-bit integers, or eight 32-bit integers. The next table describes how TotalView treats each floating-point register, and the actions you can take with each register.
Register
Description
Data Type
Edit
Dive
Specify in Expression
F0 - F31
QPX floating-point registers 0 - 31
$qpx_req
yes
yes
$q0 - $q31
FPSCR
Floating-point status register
$long
yes
no
$fpscr
The data type $qpx_reg is a TotalView predefined type that is defined as follows:
union $qpx_reg {
$double q4_double[4];
$float q8_float[8];
$int64 q4_int64[4];
$int32 q8_int32[8];
};
The traditional Book 1 Power PC floating point instructions that operate on the FPR register set operate on slot 0 of the corresponding QPX register. Therefore, the Stack Frame Pane of the Process Window shows the double contained in slot 0 (the q4_double[0] field of the $qpx_reg data type) for each QPX register. Dive on a QPX register to open a Data Pane displaying the full contents of the register.