IA-64 Processor Status Register Fields (PSR)
These fields control memory access alignment, byte-ordering, and user-configured performance monitors. It also records the modification state of floating-point registers.
Bit
Field
Meaning
1
be
big-endian enable
2
up
user performance monitor enable
3
ac
alignment check
4
mfl
lower (f2-f31) floating point registers written
5
mfh
upper (f32-f127) floating point registers written
13
ic
interruption collection
14
i
interrupt bit
15
pk
protection key enable
17
dt
data address translation
18
dfl
disabled lower floating point register set
19
dfh
disabled upper floating point register set
20
sp
secure performance monitors
21
pp
privileged performance monitor enable
22
di
disable instruction set transition
23
si
secure interval timer
24
db
debug breakpoint fault
25
lp
lower privilege transfer trap
26
tb
taken branch trap
27
rt
register stack translation
33:32
cpl
current privilege level
34
is
instruction set
35
mc
machine check abort mask
36
it
instruction address translation
37
id
instruction debug fault disable
38
da
disable data access and dirty-bit faults
39
dd
data debug fault disable
40
ss
single step enable
42:41
ri
restart instruction
43
ed
exception deferral
44
bn
register bank
45
ia
disable instruction access-bit faults