ARM64 FPSR Register

Reference_Guide : Classic TotalView Reference Guide : PART IV Platforms and Operating Systems : Architectures : ARM64 : ARM64 FPSR Register

ARM64 FPSR Register

For your convenience, TotalView interprets the bit settings of the ARM64 FPSR register. You can edit the value of the FPSR and set it to any of the bit settings outlined in the following table.

Value	Bit setting	Meaning
0x1	IOC	Invalid operation exception occurred
0x2	DZC	Division by zero exception occurred
0x4	OFC	Overflow exception occurred
0x8	UFC	Underflow exception occurred
0x10	IXC	Inexact exception occurred
0x80	IDC	Input denormal exception occurred
0x8000000	QC	Saturation occurred
0x10000000	V	Overflow condition code
0x20000000	C	Carry condition code
0x40000000	Z	Zero condition code
0x80000000	N	Negative condition code