SPARC FPSR Register
For your convenience, TotalView interprets the bit settings of the SPARC FPSR register. You can edit the value of the FPSR and set it to any of the bit settings outlined in the following table.
Value
Bit Setting
Meaning
CEXC=NX
0x00000001
Current inexact exception
CEXC=DZ
0x00000002
Current divide by zero exception
CEXC=UF
0x00000004
Current underflow exception
CEXC=OF
0x00000008
Current overflow exception
CEXC=NV
0x00000010
Current invalid exception
AEXC=NX
0x00000020
Accrued inexact exception
AEXC=DZ
0x00000040
Accrued divide by zero exception
AEXC=UF
0x00000080
Accrued underflow exception
AEXC=OF
0x00000100
Accrued overflow exception
AEXC=NV
0x00000200
Accrued invalid exception
EQ
0x00000000
Floating-point condition =
LT
0x00000400
Floating-point condition <
GT
0x00000800
Floating-point condition >
UN
0x00000c00
Floating-point condition unordered
QNE
0x00002000
Queue not empty
NONE
0x00000000
Floating-point trap type None
IEEE
0x00004000
Floating-point trap type IEEE Exception
UFIN
0x00008000
Floating-point trap type Unfinished FPop
UIMP
0x0000c000
Floating-point trap type Unimplemented FPop
SEQE
0x00010000
Floating-point trap type Sequence Error
NS
0x00400000
Nonstandard floating-point FAST mode
TEM=NX
0x00800000
Trap enable mask - Inexact Trap Mask
TEM=DZ
0x01000000
Trap enable mask - Divide by Zero Trap Mask
TEM=UF
0x02000000
Trap enable mask - Underflow Trap Mask
TEM=OF
0x04000000
Trap enable mask - Overflow Trap Mask
TEM=NV
0x08000000
Trap enable mask - Invalid Operation Trap Mask
EXT
0x00000000
Extended rounding precision - Extended precision
SGL
0x10000000
Extended rounding precision - Single precision
DBL
0x20000000
Extended rounding precision - Double precision
NEAR
0x00000000
Rounding direction - Round to nearest (tie-even)
ZERO
0x40000000
Rounding direction - Round to 0
PINF
0x80000000
Rounding direction - Round to +Infinity
NINF
0xc0000000
Rounding direction - Round to -Infinity